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(toppers-users 3085) Re: [H8]E_CTX reported by `isig_tim()' in line 63of`../jsp/systask/timer.c'. $BIQH/(B
- To: users at toppers jp
- From: $BCfB
- Date: Thu, 18 Feb 2010 07:49:26 +0900
$B$*$O$h$&$4$6$$$^$9!#CfB<$G$9!#(B
To: $B:#0f(B $BMM(B
$BJV?.$,CY$/$J$j?=$7Lu$"$j$^$;$s!#(B
$B$H$F$bM-0U5A$J>pJs$"$j$,$H$&$4$6$$$^$9!#(B
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>
> $B%3%s%Q%$%i$N:GE,2=$K$h$j!"%/%j%F%#%+%k%;%/%7%g%s$r$^$?$$$G(B
> $BL?Na$N=gHV$,F~$lBX$o$kLdBj$,(BASP$B%+!<%M%k3+H/;~$KJs9p$5$l$F(B
> $B$*$j!"(BJSP$B%+!<%M%k$G$O!"$^$@=$@5$5$l$?%P!<%8%g%s$,8x3+$5$l$F(B
> $B$$$^$;$s$G$7$?!#(B
> $B!J$3$NLdBj$N>\:Y$K$D$$$F$O!"(BASP$B%+!<%M%k$NIUB0%I%-%e%a%s%H(B
> asp/doc/porting.txt$B$N!V(B1.6 $B%/%j%F%#%+%k%;%/%7%g%s$N(B
> $B=PF~=hM}$NH$7$F2<$5$$!#!K(B
>
> jsp-1.4.3$B$H$N%Q%C%A$rE:IUCW$7$^$9$N$G!"$h$m$7$1$l$P$*;n$72<$5$$!#(B
> $B!J:#2s$NLdBj$H$OD>@\4X78$J$$ItJ,$b$"$j$^$9$,!"$4MFk8);:6H5;=QAm9g%;%s%?!<(B
> $B:#0fOBI'(B
> E-mail: imai-ka648 at pref miyagi jp
> TEL 022-377-8700
> FAX 022-377-8712
>
>
>
> diff -r jsp-1.4.3/jsp/config/h8/cpu_config.h new/jsp/config/h8/cpu_config.h
> 150a151,152
>> /* $B%/%j%F%#%+%k%;%/%7%g%s$NA08e$G%a%b%j$,=q$-49$o$k2DG=@-$,$"$k(B */
>> Asm("":::"memory");
> 157a160,161
>> /* $B%/%j%F%#%+%k%;%/%7%g%s$NA08e$G%a%b%j$,=q$-49$o$k2DG=@-$,$"$k(B */
>> Asm("":::"memory");
> 185a190,191
>> /* $B%/%j%F%#%+%k%;%/%7%g%s$NA08e$G%a%b%j$,=q$-49$o$k2DG=@-$,$"$k(B */
>> Asm("":::"memory");
> 193a200,201
>> /* $B%/%j%F%#%+%k%;%/%7%g%s$NA08e$G%a%b%j$,=q$-49$o$k2DG=@-$,$"$k(B */
>> Asm("":::"memory");
> diff -r jsp-1.4.3/jsp/config/h8/h8_3069f.h new/jsp/config/h8/h8_3069f.h
> 552,564c552,564
> < #define H8TISRB_IMIEA2_BIT 6
> < #define H8TISRB_IMIEA1_BIT 5
> < #define H8TISRB_IMIEA0_BIT 4
> < #define H8TISRB_IMFA2_BIT 2
> < #define H8TISRB_IMFA1_BIT 1
> < #define H8TISRB_IMFA0_BIT 0
> <
> < #define H8TISRB_IMIEA2 (1<<H8TISRB_IMIEA2_BIT)
> < #define H8TISRB_IMIEA1 (1<<H8TISRB_IMIEA1_BIT)
> < #define H8TISRB_IMIEA0 (1<<H8TISRB_IMIEA0_BIT)
> < #define H8TISRB_IMFA2 (1<<H8TISRB_IMFA2_BIT)
> < #define H8TISRB_IMFA1 (1<<H8TISRB_IMFA1_BIT)
> < #define H8TISRB_IMFA0 (1<<H8TISRB_IMFA0_BIT)
> ---
>> #define H8TISRB_IMIEB2_BIT 6
>> #define H8TISRB_IMIEB1_BIT 5
>> #define H8TISRB_IMIEB0_BIT 4
>> #define H8TISRB_IMFB2_BIT 2
>> #define H8TISRB_IMFB1_BIT 1
>> #define H8TISRB_IMFB0_BIT 0
>>
>> #define H8TISRB_IMIEB2 (1<<H8TISRB_IMIEB2_BIT)
>> #define H8TISRB_IMIEB1 (1<<H8TISRB_IMIEB1_BIT)
>> #define H8TISRB_IMIEB0 (1<<H8TISRB_IMIEB0_BIT)
>> #define H8TISRB_IMFB2 (1<<H8TISRB_IMFB2_BIT)
>> #define H8TISRB_IMFB1 (1<<H8TISRB_IMFB1_BIT)
>> #define H8TISRB_IMFB0 (1<<H8TISRB_IMFB0_BIT)
> 818a819,1158
>>
>> /*
>> * H8/3069F $BMQDj5A!JDI2CJ,!K(B
>> * jsp1.4.3$B$GG[I[$5$l$?(Bh8_3069f.h$B$KL5$$$b$N$rDj5A$7$F$$$k!#(B
>> * $B0J2<$N5!G=$ODj5A$5$l$F$$$J$$!#(B
>> * $B!&%9%^!<%H%+!<%I%$%s%?!<%U%'!<%9(B(SCMR)
>> * $B!&J,<~Hf%3%s%H%m!<%k(B(DVCR)
>> * $B!&Dc>CHqEENO>uBV(B(MTSCR)
>> */
>>
>> /*
>> * I/O$B%]!<%H(B
>> */
>> #define H8PORT_NUM 12 /* $B%]!<%H(B1$B!A%]!<%H(BB (DDR$BCM0l;~J]B8MQ(B) */
>>
>> /* $B%]!<%H(B1 */
>> #define H8P10DDR 0x01
>> #define H8P11DDR 0x02
>> #define H8P12DDR 0x04
>> #define H8P13DDR 0x08
>> #define H8P14DDR 0x10
>> #define H8P15DDR 0x20
>> #define H8P16DDR 0x40
>> #define H8P17DDR 0x80
>>
>> #define H8P10DR 0x01
>> #define H8P11DR 0x02
>> #define H8P12DR 0x04
>> #define H8P13DR 0x08
>> #define H8P14DR 0x10
>> #define H8P15DR 0x20
>> #define H8P16DR 0x40
>> #define H8P17DR 0x80
>>
>> /* $B%]!<%H(B2 */
>> #define H8P20DDR 0x01
>> #define H8P21DDR 0x02
>> #define H8P22DDR 0x04
>> #define H8P23DDR 0x08
>> #define H8P24DDR 0x10
>> #define H8P25DDR 0x20
>> #define H8P26DDR 0x40
>> #define H8P27DDR 0x80
>>
>> #define H8P20DR 0x01
>> #define H8P21DR 0x02
>> #define H8P22DR 0x04
>> #define H8P23DR 0x08
>> #define H8P24DR 0x10
>> #define H8P25DR 0x20
>> #define H8P26DR 0x40
>> #define H8P27DR 0x80
>>
>> #define H8P20PCR 0x01
>> #define H8P21PCR 0x02
>> #define H8P22PCR 0x04
>> #define H8P23PCR 0x08
>> #define H8P24PCR 0x10
>> #define H8P25PCR 0x20
>> #define H8P26PCR 0x40
>> #define H8P27PCR 0x80
>>
>>
>> /* $B%]!<%H(B3 */
>> #define H8P30DDR 0x01
>> #define H8P31DDR 0x02
>> #define H8P32DDR 0x04
>> #define H8P33DDR 0x08
>> #define H8P34DDR 0x10
>> #define H8P35DDR 0x20
>> #define H8P36DDR 0x40
>> #define H8P37DDR 0x80
>>
>> #define H8P30DR 0x01
>> #define H8P31DR 0x02
>> #define H8P32DR 0x04
>> #define H8P33DR 0x08
>> #define H8P34DR 0x10
>> #define H8P35DR 0x20
>> #define H8P36DR 0x40
>> #define H8P37DR 0x80
>>
>> /* $B%]!<%H(B4 */
>> #define H8P40DDR 0x01
>> #define H8P41DDR 0x02
>> #define H8P42DDR 0x04
>> #define H8P43DDR 0x08
>> #define H8P44DDR 0x10
>> #define H8P45DDR 0x20
>> #define H8P46DDR 0x40
>> #define H8P47DDR 0x80
>>
>> #define H8P40DR 0x01
>> #define H8P41DR 0x02
>> #define H8P42DR 0x04
>> #define H8P43DR 0x08
>> #define H8P44DR 0x10
>> #define H8P45DR 0x20
>> #define H8P46DR 0x40
>> #define H8P47DR 0x80
>>
>> #define H8P40PCR 0x01
>> #define H8P41PCR 0x02
>> #define H8P42PCR 0x04
>> #define H8P43PCR 0x08
>> #define H8P44PCR 0x10
>> #define H8P45PCR 0x20
>> #define H8P46PCR 0x40
>> #define H8P47PCR 0x80
>>
>> /* $B%]!<%H(B5 */
>> #define H8P50DDR 0x01
>> #define H8P51DDR 0x02
>> #define H8P52DDR 0x04
>> #define H8P53DDR 0x08
>>
>> #define H8P50DR 0x01
>> #define H8P51DR 0x02
>> #define H8P52DR 0x04
>> #define H8P53DR 0x08
>>
>> #define H8P50PCR 0x01
>> #define H8P51PCR 0x02
>> #define H8P52PCR 0x04
>> #define H8P53PCR 0x08
>>
>> /* $B%]!<%H(B6 */
>> #define H8P60DDR 0x01
>> #define H8P61DDR 0x02
>> #define H8P62DDR 0x04
>> #define H8P63DDR 0x08
>> #define H8P64DDR 0x10
>> #define H8P65DDR 0x20
>> #define H8P66DDR 0x40
>> #define H8P67DDR 0x80
>>
>> #define H8P60DR 0x01
>> #define H8P61DR 0x02
>> #define H8P62DR 0x04
>> #define H8P63DR 0x08
>> #define H8P64DR 0x10
>> #define H8P65DR 0x20
>> #define H8P66DR 0x40
>> #define H8P67DR 0x80
>>
>> /* $B%]!<%H(B7 */
>> #define H8P70DDR 0x01
>> #define H8P71DDR 0x02
>> #define H8P72DDR 0x04
>> #define H8P73DDR 0x08
>> #define H8P74DDR 0x10
>> #define H8P75DDR 0x20
>> #define H8P76DDR 0x40
>> #define H8P77DDR 0x80
>>
>> /* $B%]!<%H(B8 */
>> #define H8P80DDR 0x01
>> #define H8P81DDR 0x02
>> #define H8P82DDR 0x04
>> #define H8P83DDR 0x08
>> #define H8P84DDR 0x10
>>
>> #define H8P80DR 0x01
>> #define H8P81DR 0x02
>> #define H8P82DR 0x04
>> #define H8P83DR 0x08
>> #define H8P84DR 0x10
>>
>> /* $B%]!<%H(B9 */
>> #define H8P90DDR 0x01
>> #define H8P91DDR 0x02
>> #define H8P92DDR 0x04
>> #define H8P93DDR 0x08
>> #define H8P94DDR 0x10
>> #define H8P95DDR 0x20
>>
>> #define H8P90DR 0x01
>> #define H8P91DR 0x02
>> #define H8P92DR 0x04
>> #define H8P93DR 0x08
>> #define H8P94DR 0x10
>> #define H8P95DR 0x20
>>
>> /* $B%]!<%H(BA */
>> #define H8PA0DDR 0x01
>> #define H8PA1DDR 0x02
>> #define H8PA2DDR 0x04
>> #define H8PA3DDR 0x08
>> #define H8PA4DDR 0x10
>> #define H8PA5DDR 0x20
>> #define H8PA6DDR 0x40
>> #define H8PA7DDR 0x80
>>
>> #define H8PA0DR 0x01
>> #define H8PA1DR 0x02
>> #define H8PA2DR 0x04
>> #define H8PA3DR 0x08
>> #define H8PA4DR 0x10
>> #define H8PA5DR 0x20
>> #define H8PA6DR 0x40
>> #define H8PA7DR 0x80
>>
>> /* $B%]!<%H(BB */
>> #define H8PB0DDR 0x01
>> #define H8PB1DDR 0x02
>> #define H8PB2DDR 0x04
>> #define H8PB3DDR 0x08
>> #define H8PB4DDR 0x10
>> #define H8PB5DDR 0x20
>> #define H8PB6DDR 0x40
>> #define H8PB7DDR 0x80
>>
>> #define H8PB0DR 0x01
>> #define H8PB1DR 0x02
>> #define H8PB2DR 0x04
>> #define H8PB3DR 0x08
>> #define H8PB4DR 0x10
>> #define H8PB5DR 0x20
>> #define H8PB6DR 0x40
>> #define H8PB7DR 0x80
>>
>> /* $B#D!?#AJQ49(B */
>> #define H8DADR0 0xFFFF9C
>> #define H8DADR1 0xFFFF9D
>> #define H8DACR 0xFFFF9E
>> #define H8DASTCR 0xFEE01A
>>
>> #define H8DACR_DAOE1 0x80
>> #define H8DACR_DAOE0 0x40
>> #define H8DACR_DAE 0x20
>> #define H8DASTCR_DASTE 0x01
>>
>> /* $B#A!?#DJQ49(B */
>>
>> #define H8ADDRA 0xFFFFE0
>> #define H8ADDRB 0xFFFFE2
>> #define H8ADDRC 0xFFFFE4
>> #define H8ADDRD 0xFFFFE6
>>
>> #define H8ADDRAH H8ADDRA
>> #define H8ADDRAL (H8ADDRA + 1)
>> #define H8ADDRBH H8ADDRB
>> #define H8ADDRBL (H8ADDRB + 1)
>> #define H8ADDRCH H8ADDRC
>> #define H8ADDRCL (H8ADDRC + 1)
>> #define H8ADDRDH H8ADDRD
>> #define H8ADDRDL (H8ADDRD + 1)
>>
>> #define H8ADCSR 0xFFFFE8
>> #define H8ADCR 0xFFFFE9
>>
>> #define H8ADCSR_ADF 0x80
>> #define H8ADCSR_ADIE 0x40
>> #define H8ADCSR_ADST 0x20
>> #define H8ADCSR_SCAN 0x10
>> #define H8ADCSR_CKS 0x08
>> #define H8ADCSR_CH2 0x04
>> #define H8ADCSR_CH1 0x02
>> #define H8ADCSR_CH0 0x01
>>
>> #define H8ADCR_TRGE 0x80
>>
>> /* $B3d9~$_4XO"(B */
>>
>> /* IRQ$B%;%s%9!&%3%s%H%m!<%k!&%l%8%9%?(B */
>> #define H8ISCR_IRQ0SC 0x01
>> #define H8ISCR_IRQ1SC 0x02
>> #define H8ISCR_IRQ2SC 0x04
>> #define H8ISCR_IRQ3SC 0x08
>> #define H8ISCR_IRQ4SC 0x10
>> #define H8ISCR_IRQ5SC 0x20
>>
>> /* IRQ$B%$%M!<%V%k!&%l%8%9%?(B */
>> #define H8IER_IRQ0E (1<<(H8IER_IRQ0E_BIT))
>> #define H8IER_IRQ1E (1<<(H8IER_IRQ1E_BIT))
>> #define H8IER_IRQ2E (1<<(H8IER_IRQ2E_BIT))
>> #define H8IER_IRQ3E (1<<(H8IER_IRQ3E_BIT))
>> #define H8IER_IRQ4E (1<<(H8IER_IRQ4E_BIT))
>> #define H8IER_IRQ5E (1<<(H8IER_IRQ5E_BIT))
>>
>> /* $B%$%s%?!<%i%W%H!&%9%F!<%?%9!&%l%8%9%?(B */
>> #define H8ISR_IRQ0F 0x01
>> #define H8ISR_IRQ1F 0x02
>> #define H8ISR_IRQ2F 0x04
>> #define H8ISR_IRQ3F 0x08
>> #define H8ISR_IRQ4F 0x10
>> #define H8ISR_IRQ5F 0x20
>>
>> /* DMA$B4XO"(B */
>>
>> /* DMAC $B%A%c%M%k(B0A */
>> #define H8DMA_MAR0AR 0xffff20
>> #define H8DMA_MAR0AE 0xffff21
>> #define H8DMA_MAR0AH 0xffff22
>> #define H8DMA_MAR0AL 0xffff23
>> #define H8DMA_IOAR0A 0xffff26
>> #define H8DMA_ETCR0AH 0xffff24
>> #define H8DMA_ETCR0AL 0xffff25
>> #define H8DMA_DTCR0A 0xffff27
>>
>> /* DMAC $B%A%c%M%k(B0B */
>> #define H8DMA_MAR0BR 0xffff28
>> #define H8DMA_MAR0BE 0xffff29
>> #define H8DMA_MAR0BH 0xffff2A
>> #define H8DMA_MAR0BL 0xffff2B
>> #define H8DMA_IOAR0B 0xffff2E
>> #define H8DMA_ETCR0BH 0xffff2C
>> #define H8DMA_ETCR0BL 0xffff2D
>> #define H8DMA_DTCR0B 0xffff2F
>>
>> /* DMAC $B%A%c%M%k(B1A */
>> #define H8DMA_MAR1AR 0xffff30
>> #define H8DMA_MAR1AE 0xffff31
>> #define H8DMA_MAR1AH 0xffff32
>> #define H8DMA_MAR1AL 0xffff33
>> #define H8DMA_IOAR1A 0xffff36
>> #define H8DMA_ETCR1AH 0xffff34
>> #define H8DMA_ETCR1AL 0xffff35
>> #define H8DMA_DTCR1A 0xffff37
>>
>> /* DMAC $B%A%c%M%k(B1B */
>> #define H8DMA_MAR1BR 0xffff38
>> #define H8DMA_MAR1BE 0xffff39
>> #define H8DMA_MAR1BH 0xffff3A
>> #define H8DMA_MAR1BL 0xffff3B
>> #define H8DMA_IOAR1B 0xffff3E
>> #define H8DMA_ETCR1BH 0xffff3C
>> #define H8DMA_ETCR1BL 0xffff3D
>> #define H8DMA_DTCR1B 0xffff3F
>>
>> /* $B%G!<%?%H%i%s%9%U%!%3%s%H%m!<%k%l%8%9%?(B (DTCR) */
>> #define H8DMA_DTCR_DTE 0x80
>> #define H8DMA_DTCR_DTSZ 0x40
>> #define H8DMA_DTCR_DTID 0x20
>> #define H8DMA_DTCR_RPE 0x10
>> #define H8DMA_DTCR_DTIE 0x08
>> #define H8DMA_DTCR_DTS2 0x04
>> #define H8DMA_DTCR_DTS1 0x02
>> #define H8DMA_DTCR_DTS0 0x01
>>
> diff -r jsp-1.4.3/jsp/config/h8/hw_timer.h new/jsp/config/h8/hw_timer.h
> 129c129
> < sil_wrb_mem((VP)SYSTEM_TIMER_IER, SYSTEM_TIMER_IE);
> ---
>> bitset((UB *)SYSTEM_TIMER_IER, SYSTEM_TIMER_IE_BIT);
>
>